CamArray HAT (4x IMX519) on custom Xilinx host -- MIPI TX clock lane not detected. What line rate and clock mode does the HAT output?

Raspberry Pi Cameras mipi-camera-modules
1

Hi everyone,

I’m using the 16MP Synchronized Quad-Camera Kit (CamArray HAT UC-512, 4x IMX519) with a custom Xilinx Zynq UltraScale+ host instead of a Raspberry Pi, and I need a few details about the HAT’s MIPI output that I can’t determine from the outside.

What works:

  • I2C reaches the HAT correctly - ArduChip at 0x24 reads and writes, IMX519 at 0x1A returns chip ID 0x0519
  • I captured the full I2C sequence from a working Raspberry Pi 3 with kernel tracepoints during rpicam-still and replayed it byte-for-byte, including the 2328x1748 mode registers. The sensor frame counter at 0x0005 increments at the expected rate, so the sensors are streaming
  • Re-writing ArduChip register 0x24 while the sensors are already streaming makes the HAT start transmitting - the data lanes move from 1.18 V (LP-11 idle) to 0.50 V average, which is consistent with high-speed activity
  • The same host, bitstream, connector and cable work correctly with a Raspberry Pi Camera v2 (IMX219)
  • I2C scan on the HAT finds devices at 0x0C, 0x1A, 0x24, 0x50 and 0x58.

What doesn’t work:

My host’s D-PHY never completes clock lane initialisation with the HAT attached. The clock lane status register reads 0x09 (stop state + init complete) with the IMX219, but 0x00 with the HAT. An internal logic analyser shows the recovered byte clock toggling with the IMX219 and completely static with the HAT. No CSI-2 packets are ever decoded, and no errors are reported.

Measured lane voltages with the HAT streaming: data lanes 0.50/0.57 V, clock lane CK_P and CK_N both 0.22 V steady, unused lanes 0.03 V. The clock lane sitting at the high-speed common mode with no excursions suggests a continuous free-running clock.

I’ve ruled out cable continuity, supply rails, D-PHY line rates of 816/912/987/1260 Mbps, HS_SETTLE from 50–220 ns, both channel modes, both initialisation orderings, and a HAT power cycle with the host receiver already active.

My questions:

  1. What MIPI line rate does the HAT output in single-channel mode, and in four-in-one mode?
  2. Does the HAT’s MIPI TX use a continuous (free-running) clock, or does the clock lane return to LP-11 between frames? Is this configurable?
  3. How can I read the HAT’s firmware version, and is a newer version available?
  4. Is anything required of the host beyond the sensor register initialisation and the ArduChip 0x24 mode write?
  5. My HAT presents both 0x0C (AK7375 VCM) and 0x24 (ArduChip mode register), so it appears to be running the mux-style firmware rather than Pivariety. How do I read the firmware version on this variant? Is Pivariety firmware available for it, and does the MIPI TX behave differently between the two?

Happy to provide register dumps, logic analyser captures or the I2C trace if useful.

Thanks